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    Platform Validation Sr Engineer - Guadalajara, México - Taleo Be

    Taleo Be
    Taleo Be Guadalajara, México

    hace 4 días

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    Descripción

    Job Details:

    Job Description:

    We are the Data Products Architecture and Engineering (DPEA) within Data Center and Artificial Intelligence (DCAI), driving Data Center and Cloud transformation through innovation, reliability and proven performance.

    There are reasons Intel is the global leader and preferred provider of server technology and products.

    Intel understands the needs of the modern data center and harnesses its years of experience and design expertise to deliver a broad portfolio of innovative server products, systems, and solutions to help businesses grow and be competitive in the market.

    Our team is motivated with passionate engineers to the core of our heart, and we are looking for more leaders and path finders.

    We are seeking a Platform Validation Sr Engineer to join the Intel Xeon Accelerated Performance/ Scalable Performance (AP/SP) Platform Integration and Validation team.

    This role as Platform Debug Lead Engineer is responsible for working with reference and custom systems to define, coordinate, and lead the validation of server platforms that showcase Intel's futuristic datacenter products.

    This position requires a combination of validation engineering and execution leadership.

    A Platform Validation Sr Engineer is the critical link among the silicon, board, system, ingredient development teams, and the platform integration/validation teams, ensuring effective root cause and issue resolution.

    Projects will be varied, including new reference designs for server platforms, high-volume customer designs, and unique one-off customer designs.

    Your responsibilities will include but not limited to:
    Define, design, execute Server platform Pre-Silicon and Post-Silicon validation plans for current and future products.
    Lead validation efforts to ensure quality of Server Platform and Silicon.
    Lead debug efforts for issues found during Pre-silicon, Power-On, Post-silicon, Customer engagement to product release.
    Lead cross-functional engagement with Design, Silicon validation, IP teams, Execution/Automation teams and Program leads.
    Develop and execute validation tasks, review requirements coverage, lead execution, drive debug and taskforces for issues resolution.
    Developing test content to cover product requirements accordingly.
    Voice of the team to represent issues found in debug at the corresponding forums.
    Participating in product planning and release meetings providing input and facilitating decisions.
    Provide mentorship and technical direction to distributed team of system validation engineers for program execution.
    Role model for the organization and junior engineers.


    Behavioral Traits:
    Self-motivated, make decisions where and when needed.
    Advanced problem-solving and communication skills.
    Strong Networking and influencing skills.
    Track record of team and collaboration skills.


    Qualifications:
    Minimum Qualifications, you must possess the below minimum qualifications to be initially considered for this position:
    Bachelor's degree in electronic engineering, Computer Engineering, Computer Systems, or related STEM fields.
    Advanced English level.


    5+ years of experience:


    Programming in Python, C and C++.Hands-on experience in design and validation of processer based electronic systems (Computer Architecture).Hands-on technical, individual contributor in Silicon/Platform development engineering environment in CPU/logic and/or memory products.

    Experience working to integrate various system components (HW, BIOS, OS, Drivers, etc.) and validate/debug to the requirements for server platforms.

    Working with Linux.
    Test plan and test development experience.
    The position is in Mexico, it is not eligible for employment-based visa/immigration sponsorship.

    Preferred qualifications, preferred qualifications are in addition to the minimum requirements and are considered a positive factor in identifying top candidates.

    Master of Science degree in Electrical/Electronic Engineering or Computer Engineering/Science or related STEM field with 3+ years of industry experience.

    System and/or Functional validation expertise.
    Influencing the IP/SoC design decisions and/or pre-/post- validation methods by doing validation gap analysis.

    Experience with chipset/processor interfaces (PCI Express, UPI, Memory, USB, SAS, etc.) and be able to interpret specifications to assist with debug and test development.

    Experience with Cloud Service Provider (CSP) and Original Equipment Manufacturer (OEM) teams.
    Experience in automation and test/integration methodologies.
    Experience developing validation methodologies and infrastructure solutions.

    Experience in Server based technologies, Machine Learning, Microprocessor, CPU, or FPGA validation, PCIe, DRAM, I2C, SMBus, Ethernet architecture and Cloud Technologies.

    Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


    Job Type:

    Experienced Hire Shift:
    Shift 1 (Mexico)

    Primary Location:
    Mexico,

    Guadalajara Additional Locations:

    Business group:The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems.

    DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.


    Posting Statement:


    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

    Position of TrustN/A Work Model for this Role

    This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

    In certain circumstances the work model may change to accommodate business needs.
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